LanGuardian - Motorola 68LC040 Information

This information is taken from the Motorola Web Site. Unfortunately, Motorola's web group seem to routinely shuffle around their web pages without concern for maintaining external visibility to information. So, I've made a copy of their information here.

The MC68040, MC68040V, MC68LC040, and MC68EC040 are Motorola's fourth generation of M68000-compatible, high-performance, 32-bit microprocessors. All four devices are virtual memory microprocessors employing multiple concurrent execution units and a highly integrated architecture that provides very high performance. They integrate an MC68030-compatible integer unit (IU) and two independent caches. The MC68040, MC68040V, and MC68LC040 contain dual, independent, demand-paged memory management units (MMUs) for instruction and data stream accesses and independent, 4-Kbyte instruction and data caches. The MC68040 contains an MC68881/MC68882-compatible floating-point unit (FPU). The use of multiple independent execution pipelines, multiple internal buses, and a full internal Harvard architecture, including separate physical caches for both instruction and data accesses, achieves a high degree of instruction execution parallelism on all three processors. The on-chip bus snoop logic, which directly supports cache coherency in multimaster applications, enhances cache functionality.

MC68040 Features

Last Updated: $Date: 2003/01/14 02:20:00 $